Wikitronics
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INPUT
A
OUTPUT
NOT A
0 1
1 0

The NOT gate or inverter is a digital logic gate that implements logical negation. It behaves according to the truth table to the right. A HIGH output (1) results if the inputs is LOW (0). If the input is HIGH (1), a LOW output (0) results.



Symbols[]

There are two symbols for NOT gates: the 'military' symbol and the 'rectangular' symbol. For more information see Logic Gate Symbols

'Military' NOT Symbol

'Rectangular' NOT Symbol



File:CMOS 4049 diagram.svg

This schematic diagram shows the arrangement of NOT gates within a standard 4049 CMOS hex inverting buffer.

Hardware Description and Pinout[]

NOT Gates are basic logic gates, and as such they are recognised in TTL and CMOS ICs. The standard, 4000 series, CMOS IC is the 4049, which includes six independent NOT gates. The pinout diagram is as follows:

This device is available from most semiconductor manufacturers such as Philips. It is usually available in both through-hole DIL and SOIC format. Datasheets are readily available in most Datasheet Databases.

Implementations[]

File:NMOS NOT.png

NMOS NOT gate

File:PMOS NOT.png

PMOS NOT gate

File:TTL NOT gate.svg

Transistor-Transistor logic NOT gate

Alternatives[]

File:NOT Using NAND.jpg

NOT gate constructed using only a NAND gate

If no specific NOT gates are available, one can be made from NAND gates in the configuration shown below. Alternatively, a NOR gate could be used in the same configuration. Any logic gate can be made from a combination of NAND gates or NOR gates.

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